| ECC1C 145-944-00

I2C

I2C system ID: 0x31

I2C slave driver which supports only raw I2C read/write frames. SMBus frames are not supported. Speed clock capability of driver is up to 400kHz with 100ns rise time and 10ns fall time. The driver supports reception and transmission of 6 or 12 or 24 data byte frames only (+1 address byte in total) depending of BoardEEPROM "I2C register count" (0x2017) register.

Master has the possibility to read/write two system registers. However, all 12 data bytes have to be clocked by the master even if one system register needs to be manipulated. If a different size of data frame other than 12 is sent, data will be corrupted until receive buffer of slave is fully flushed.

Two types of commands are supported.

1 - Write Command
a. Type of command which need an action from slave without send any specific answer.
b. I2C sequence is composed like that :

|_START_|_Slave_Address_|_Wr_|_A_|_SYS_ID_1_|_A_|_REG_ID_1_|_A_|_VALUE_1_BYTE_1_|_A_|_VALUE_1_BYTE_2_|_A_|_VALUE_1_BYTE_3_|_A_|....

|_VALUE_1_BYTE_4_|_A_|_SYS_ID_2_|_A_|_REG_ID_2_|_A_|_VALUE_2_BYTE_1_|_A_|_VALUE_2_BYTE_2_|_A_|_VALUE_2_BYTE_3_|_A_|_VALUE_2_BYTE_4_|_A_|_STOP_|

All write capable registers can be written through I2C. Received frame is executed right after reception. If all bytes are acknowledged, this means that they are successfully received. If master needs to validate that the system registers were written successfully, he needs to read the local I2C system registers 0x03 and 0x04 (see Table below). They are always updated with the error code results from the I2C write execution system registers 1 and 2.

2- Request Command
a. Type of command which need a specific data answer from Slave Device.
b. I2C sequence is composed like that :

|_START_|_Slave_Address_|_Rr_|_A_|_SYS_ID_1_|_A_|_REG_ID_1_|_A_|_VALUE_1_BYTE_1_|_A_|_VALUE_1_BYTE_2_|_A_|_VALUE_1_BYTE_3_|_A_|....

|_VALUE_1_BYTE_4_|_A_|_SYS_ID_2_|_A_|_REG_ID_2_|_A_|_VALUE_2_BYTE_1_|_A_|_VALUE_2_BYTE_2_|_A_|_VALUE_2_BYTE_3_|_A_|_VALUE_2_BYTE_4_|_~A_|_STOP_|

Since the repeated start condition is not supported, I2C system has two internal registers whose value points to the address of system register 1 and 2 to be read. The values of the registers to be transmitted, are updated at the control frequency. If Master reads faster than the control frequency the same value shall be transmitted until the transmit register is updated.

If read command fails, 0x7cf0bdc2 will be given as answer.

For example, Master wants to read Capacitive Feedback registers of A and B channels. He has to first issue a write command and write to the I2C internal pointer registers (0x3100 and 0x3101) the values 0x2901 and 0x2902 respectively (address of capacitive feedback registers A and B). After that, internal pointer registers of the I2C system point to the Capacitive Feedback registers. Now Master has to initiate a read command to get the capacitive feedback values. I2C transmit buffer will be updated at ever control cycle. Master does not need to issue an other write command as long as he wants to read the capacitive feedback. Only when the pointer registers need to be updated Master has to issue an other write command.

Register values are transmitted with MSB first.

### Register map:

Address | Name | Default Value | Description | Type | Access
--- | --- | --- | --- | --- | ---
0x3100 | I2C read pointer 0 | 0x1003 | The address of the register that will be used to evaluate the first register in the read request Value is updated at controller frequency. | uint32 | read write
0x3101 | I2C read pointer 1 | 0x1004 | The address of the register that will be used to evaluate the second register in the read request Value is updated at controller frequency. | uint32 | read write
0x3102 | I2C read pointer 2 | 0x1003 | The address of the register that will be used to evaluate the first register in the read request Value is updated at controller frequency. | uint32 | read write
0x3103 | I2C read pointer 3 | 0x1004 | The address of the register that will be used to evaluate the second register in the read request Value is updated at controller frequency. | uint32 | read write
0x3104 | Write error response 0 | 0 | Error response of the first register of the write request. | uint32 | read only
0x3105 | Write error response 1 | 0 | Error response of the second register of the write request. | uint32 | read only
0x3106 | Write error response 2 | 0 | Error response of the third register of the write request. | uint32 | read only
0x3107 | Write error response 3 | 0 | Error response of the forth register of the write request. | uint32 | read only